WO1998052330A1 - Apparatus and method for noise-predictive maximum likelihood detection - Google Patents
Apparatus and method for noise-predictive maximum likelihood detection Download PDFInfo
- Publication number
- WO1998052330A1 WO1998052330A1 PCT/IB1997/000554 IB9700554W WO9852330A1 WO 1998052330 A1 WO1998052330 A1 WO 1998052330A1 IB 9700554 W IB9700554 W IB 9700554W WO 9852330 A1 WO9852330 A1 WO 9852330A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- noise
- detector
- samples
- impulse response
- infinite impulse
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
- G11B20/10046—Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter
- G11B20/10055—Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter using partial response filtering when writing the signal to the medium or reading it therefrom
- G11B20/10175—PR4, PR(1,0,-1), i.e. partial response class 4, polynomial (1+D)(1-D)=(1-D2)
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
Definitions
- Present invention relates to data detection apparatus and methods. It is in particular applicable to direct access storage (DASD) devices using partial-response (PR) signaling and maximum likelihood sequence detection (MLSD).
- DASD direct access storage
- PR partial-response
- MLSD maximum likelihood sequence detection
- the signal read from the storage device or received at the output of a transmission channel has to be converted in the receiver into a sequence of symbols which most likely represents the data (symbol) sequence initially stored or transmitted by the sender, despite interference between adjacent symbols, and despite added noise.
- the optimum receiver for detecting an uncoded data sequence in the presence of inter- symbol interference (ISI) and noise consists of a whitened-matched filter followed by a Viterbi detector which performs maximum likelihood sequence detection on the ISI trellis.
- ISI inter- symbol interference
- PRML Partial-Response Maximum Likelihood
- the composite noise at the input of the detector is not white, resulting in sub-optimal performance.
- This sub-op- timality is more pronounced at high recording densities since the linear PR4 (PR class 4) equalizer tends to enhance the electronic noise component of the composite noise at the input of the PRML detector.
- nonlinear distortion due to nonlinear bit-shift and head asymmetry could further degrade performance of PRML systems.
- IBM International Patent Application PCT/WO97/11544 discloses a scheme for data detection in a direct access storage device, called NPML (Noise-Predictive Maximum Li- kelihood detection), that arises by imbedding a noise prediction/whitening filter into the branch metric computation of the Viterbi detector. It has been shown via simulations that the NPML detectors offer substantial performance gains over the PRML detectors.
- NPML Noise-Predictive Maximum Li- kelihood detection
- the imbedded predictor/whitener as a bank of finite-impulse-response (FIR) filters or equivalent table look-up operations, e.g. by means of random access memory (RAM), demands a certain level of complexity of the NPML hardware realization.
- FIR finite-impulse-response
- RAM random access memory
- Viterbi algorithm to channels represented by an IIR (Infinite Impulse Response) discrete-time equivalent model has been studied in a publication by A. Duel- Hallen et al. "Delayed decision-feedback sequence estimation," IEEE Trans. Commun., COM-37, pp.428-436, May 1989.
- the approach in that reference assumes a decision feedback equalization prefilter whose feedback filter is an IIR filter combined with Viterbi detection.
- the present invention considers a forward partial-response or generalized partial-response linear equalizer and a noise whitening IIR predictor imbedded into the Viterbi detector.
- Another object of the invention is to enable additional mechanisms for a maximum likelihood detector which allow compensation of reading head asymmetries and of DC offset in the receiver.
- the invention provides a partial-response signaling, maximum likelihood detector with an infinite impulse response (IIR) noise predictor and whitening filter imbedded in the Viterbi detector (INPML).
- IIR infinite impulse response
- INPML Viterbi detector
- a DC (zero frequency) notch filter may be provided for DC offset compensation.
- an additional compensation method can be provided that is imbedded in the branch metric computation of the INPML detector for dynamic signal-asymmetry and DC offset compensation.
- Advantages of the invention are that, besides its simplicity in implementation, it does not compromise performance of the detector. It has the further important advantage that it can be "piggy-backed" on existing PRML systems so that there is no need for development and implementation of an entirely new channel architecture which would be a complex and costly task.
- the addition of a DC-notch filter or DC compensation method renders the INPML detector completely immune to DC offset, tolerant and robust against various types of non-linearity and in particular head asymmetry, and tolerant to thermal asperities, which is a further impairment in digital magnetic recording systems.
- Fig. 1 is a block diagram of a PRML detector in which present invention can be implemented.
- Fig. 2A is a block diagram of the maximum likelihood detector according to the invention with a single-pole imbedded IIR noise predictor .
- Fig. 2B shows an alternative, equivalent implementation of the IIR noise predictor for the inventive maximum likelihood detector of Fig. 2A.
- Fig. 3 shows the 4-state trellis for the INPML detector of Fig. 2A.
- Fig.4 is a block diagram of an alternative maximum likelihood detector in accordance with the invention in which an imbedded IIR noise predictor with 2 poles and 2 zeros is provided.
- Fig. 5 shows the bit error probability for various ML detectors including the INPML detector of the invention for a channel with the normalized linear recording density PW50/T « 2.86.
- Fig. 6 shows the relative SNR for a given bit error probability, also for various ML detectors including INPML (4 states), as a function of PW50/T.
- Fig. 7A is a block diagram of an inventive INPML detector with an additional, imbedded DC-notch filter.
- Fig. 7B schematically shows a first arrangement of an INPML detector with a cascaded DC-notch filter (between equalizer and detector).
- Fig. 7C schematically shows a second arrangement of an INPML detector with a cascaded DC-notch filter (preceding the equalizer).
- Fig. 8 illustrates a RAM based dynamic non-linearity estimation to be used for DC offset and head asymmetry compensation.
- Fig. 1 is the block diagram of a known PRML channel architecture for a data recording system. Such a system was also described in the above mentioned International Patent Application PCT WO97/11544.
- Customer data / course are written in the form of binary digits a n e ⁇ -1 , +1 ⁇ by write head 15 on the disk 11 after being encoded in an encoder 12 by a rate-8/9 RLL (Run Length Limited) code and serialized in a serializer 13 and precoded in a precoder 14 by a — - — ⁇ operation where D is the unit delay operator and ⁇ means addition modulo 2.
- RLL Random Length Limited
- the output signal of the VGA circuit 17 is first low-pass filtered using an analog low-pass filter 18 (LPF) and then converted to a digital form x n by an analog-to-digital (A/D) converter 19.
- the functions of the A/D converter 19 and VGA amplifier 17 are controlled by the timing recovery and gain control loops 20/26 and 21/26, respectively.
- the analog low-pass filter 18 is preferably a filter which boosts the higher frequencies to avoid saturation of the A D converter 19 and to support the digital equalizer 22.
- the digital samples x n at the output of the A/D converter 19 (line labeled A in Fig. 1 ) are first shaped to PR4 signal samples by the digital equalizer 22 (line labeled B in Fig.
- ML detector maximum likelihood detector circuitry 10
- the output data of the ML detector 10 i.e. the final decisions on the line labeled C in Fig. 1
- inverse precoder 23 performing a l ⁇ D 2 operation
- rate 9/8 decoder 25 for the rate-8/9 RLL code which delivers the retrieved customer data I n _ d .
- the inverse precoder function 23 following the ML detector in Fig. 1 can be a separate functional block (as shown) or it can be imbedded in the trellis (survivor path memory) of the ML detector.
- the maximum likelihood detector 10 was a noise-predictive maximum likelihood detector (NPML detector) which uses a finite impulse response (FIR) filter/predictor to estimate the noise contents of the input signals.
- NPML detector noise-predictive maximum likelihood detector
- FIR filter/predictor uses a finite impulse response filter/predictor to estimate the noise contents of the input signals.
- Present invention provides an improvement for the maximum likelihood detector portion of a PRML data recording channel. Its principles are shown in the block diagram of Fig.2A which represents the ML detector portion 10 of Fig. 1.
- the PR4-equalized samples y n appearing on line 30 (marked B) are modified by the noise prediction process according to the invention, fed as samples z consult to the Viterbi detector 31 which on its output 32 delivers the recovered data symbols ⁇ n _ d , which are the delayed final decisions (marked C) of the Viterbi detector.
- Preliminary symbols (path history decisions) a n are delivered on an output 33 of the Viterbi detector.
- the IIR predictor 35 of present preferred embodiment is a single-pole device. It receives the noise samples w n on line 28, which then are delayed in unit delay means 40. Its output, after combination with a delayed noise signal (output of unit delay means 43) in adder 41 and multiplication by a coefficient a in multiplication means 42, provides the desired noise signal w n on line 36.
- the IIR noise predictor 35 executes the transfer function aD/( ⁇ - aD).
- the noise predictor is an infinite impulse response device which is imbedded (for each state) into the maximum likelihood detection arrangement, as shown in Fig. 2A.
- This arrangement will be termed INPML detector in the following (for "Infinite impulse response Noise Predictive Maximum Likelihood” detector). Its operation is described in the sequel.
- y n be the output of the PR4 digital equalizer, line labeled B in Fig. 1 and Fig. 2A.
- This output then consists of a PR4 data signal, with noiseless nominal values of - 2, 0, + 2, and colored noise, i.e.,
- a n £ ⁇ -1, + 1 ⁇ denotes the encoded/precoded data sequence written on the magnetic medium with a rate l/T and w n represents the colored noise sequence at the output of the digital partial-response equalizer ⁇ T is the channel encoded bit time interval and subscript n indicates time instant nT).
- the power of the colored noise component w n in (1) can be reduced by noise prediction.
- Figure 2A shows the basic concept of a single coefficient IIR predictor imbedded into the Viterbi detector.
- the basic principle can be explained as follows. Let
- w(D) in (3) represents the D-transform of the colored noise sequence in (1 ) and w(D) denotes its predicted value through the single-pole prediction filter.
- w(D) satisfies the following recursive equation
- the single-pole IIR predictor filter 35 described by (4) and (5) and shown in Fig. 2A can also be implemented as shown in Fig.2B.
- This IIR predictor 35b also receives noise samples w n on line 28. They are combined in adder 41 with predicted noise samples w n , then delayed by unit delay element (D) 40b and then multiplied in multiplication means 42 by a coefficient a, to provide predicted noise samples w n on output line 36.
- ⁇ n (s j ,s k ) yford- a n + a n _ 2 (s ] ) + w n (S j ) ?n(Sj,S k ) (6)
- a n and a n _ 2 ⁇ s.) are determined by the hypothesized state transition s ⁇ s k and w n (S j ) is the predicted noise sample associated with state s-.
- the reconstructed PR4 samples (a n _ ] - a n _ 3 ) in (5) are replaced in practice by ( ⁇ leader_ ⁇ - ⁇ n _ 3 ) which are obtained from the path memory of the Viterbi detector associated with state S .
- the 4-state INPML detector with a single-pole IIR predictor/whitening filter operates on the trellis shown in Figure 3. Every state at time instant nTs associated with :
- the INPML detector becomes a conventional 4-state PRML detector.
- the prediction error (whitening) filter includes two poles and two zeros.
- the predictor 45 shown in Fig. 4 has the same connections to the other portions of the Viterbi detector as predictor 35 in Fig. 2A: A line 28a (28) transferring noise samples vvquel , and a line 36a (36) for the predicted noise samples w n .
- noise samples w n appearing on input 28a are twice delayed in unit delay elements 47 and 48, then multiplied in multiplier 49 by factor [ - (a 2 + ⁇ 2 )] ⁇ an d then combined in adder unit 50 with "auxiliary" signals on lines 51 , 52, and 53 to provide predicted noise samples w n on line 36a.
- auxiliary signals are derived as follows: Signal on line 51 results from multiplying the output of delay unit 47 in multiplier 54 by a factor [ - ( ⁇ , + ⁇ x )]. Signal on line 52 results from multiplying predicted noise samples w n , delayed in unit delay means 55, by a factor [ — a j ] in a multiplier 56. Signal on line 53 results from multiplying predicted noise sample w n , twice delayed in unit delay means 55 and 57, by a factor [ - a 2 ] in multiplier 58. IIR noise predictor 45 executes the transfer function
- E(D) ⁇ l + a x D + a 2 D 2 ' ⁇ 8) denote the D-transform of the two-poles, two-zeros IIR prediction error (whitening) filter. Then, the D-transform of the whitened noise sequence at the output of E(D) is given by
- w(D) in (9) represents the D-transform of the colored noise sequence in (1) and w(D) denotes its predicted value through the 2-poles/2-zeros prediction filter.
- w(D) satisfies the following recursive equation
- a n and a n _ 2 (s) are determined by the hypothesized state transition s ⁇ s k and w n (S j ) is a noise estimate associated with state s .
- the branch metrics (12) for each state transition can now be computed explicitly from expressions (7) with w n (S j ) according to (11 ).
- IIR predictors with at most 2 poles and 2 zeros offer the best possible performance irrespective of the noise source, i.e., electronic noise or disk noise, or a combination thereof.
- the noise source i.e., electronic noise or disk noise, or a combination thereof.
- FIG. 5 shows bit error probabilities of simulated 4-state INPML and NPML detectors for the channel model with PW50/T « 2.86.
- Curve 2 shows the performance of INPML4 (4-state INPML) with a single-pole predictor; compared to curves 1 (PRML) and 3 (EPRML), a gain in noise margin of 2 dB and 0.5 dB is obtained, respectively.
- curve 5 corresponds to a 4-state INPML detector with a 2-zeros and 2-poles IIR predictor. Compared to curve 4 an additional 0.2 dB is obtained, and compared to PRML 2.7 dB gain is obtained.
- Curve 1 corresponds to our reference PRML system.
- the single-pole INPML system is very close in performance to the NPML system and that both provide superior performance compared to all the other systems at any linear recording density.
- the transfer function of a digital notch filter is given by a second order rational function with two parameters that characterize the location and width of the notch (see article by P. Regalia, S. K. Mitra and P. P. Vaidyanathan "The Digital All-Pass Filter: A Versatile Signal Processing Building Block," PROCEEDINGS of the IEEE , VOL.76, pp. 19-37, January 1988).
- the sensitivity of INPML detectors to DC offset can be eliminated by utilizing such a filter with a notch at DC. It can be seen that the transfer function of a digital DC-notch filter is given by
- b is a constant that determines the width of the notch.
- b must be chosen very close to unity. In this case, (1 + b)/2 ⁇ 1 and the transfer function of the notch filter simplifies to
- c is a constant that determines the width of the notch. For a very narrow notch c must be chosen very close to zero.
- the DC-notch filter can be either imbedded into the INPML detector as part of the whitening IIR predictor or cascaded with the INPML detector.
- Figures 7A, 7B and 7C show the block diagrams of three possible configurations of an INPML detector with a DC-notch filter.
- the notch filter 44a is included in the feedback path between the second output of the Viterbi detector 31 and its input, the path which also contains the IIR predictor 35.
- the notch filter 44b is inserted between the digital equalizer 22 and the INPML detector 10, and thus receives the samples y n at its input.
- the notch filter 44c precedes the digital equalizer 22.
- the same approach can be applied to other DC sensitive detectors such as NPML, non- adaptive DFE (decision feedback equalizer) and FDTS (fixed delay tree search) detectors.
- An MR head is a nonlinear transducer that introduces asymmetry in the readback signal. Positive peaks can differ in amplitude from negative peaks by as much as 30 %.
- DC insensitive detectors such as PRML and INPML cascaded with a DC-notch filter are quite tolerant to small amounts of head asymmetry and suffer only a small performance degradation. The high losses in performance due to large amounts of head asymmetry can be recovered by an asymmetry estimation/compensation algorithm which is imbedded into the branch-metric computation of the INPML detector.
- J n + X (2) min ⁇ J n (0) + Aric(0, 2) , J n ( ⁇ ) + ⁇ n ⁇ , 2) ⁇ a eabel (0, 2)
- the values of the nonlinear function f(a n , a n _ 2 ) can be estimated for a particular head and media combination during manufacturing and then be used as fixed predetermined values in the branch metric computation unit of the INPML detector.
- Dynamic estimation can be achieved by a table look-up stochastic gradient algorithm which updates one memory location per time interval.
- a table look-up stochastic gradient algorithm which updates one memory location per time interval.
- f n + ⁇ (a n _ d , a n _ 2 _ d ) f ia n _ d , a n _ _ d ) + ⁇ e n _ d ,
- e n-d [ y n -d - f n ( ⁇ n -d> "n-2-d) 1 '
- This model is basically a second-order noniinearity coupled with a DC offset.
- Figure 9 shows the error performance of a 4-state INPML detector with a single-pole predictor in the presence of electronic noise and head asymmetry for the channel model with PW50/T ⁇ 2.86.
- the head asymmetry is 33%.
- Curve 1 shows the performance of INPML without any asymmetry compensation.
- curve 4 shows the performance of INPML with ideal asymmetry estimation/ compensation.
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE69723477T DE69723477T2 (en) | 1997-05-15 | 1997-05-15 | ARRANGEMENT AND METHOD FOR NOISE-PROTECTIVE MAXIMUM LIKELIHOOD DETECTION |
JP54896098A JP3540329B2 (en) | 1997-05-15 | 1997-05-15 | Apparatus and method for noise prediction maximum likelihood detection |
US09/403,628 US6625235B1 (en) | 1997-05-15 | 1997-05-15 | Apparatus and method for noise-predictive maximum likelihood detection |
EP97918303A EP0981880B1 (en) | 1997-05-15 | 1997-05-15 | Apparatus and method for noise-predictive maximum likelihood detection |
PCT/IB1997/000554 WO1998052330A1 (en) | 1997-05-15 | 1997-05-15 | Apparatus and method for noise-predictive maximum likelihood detection |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/IB1997/000554 WO1998052330A1 (en) | 1997-05-15 | 1997-05-15 | Apparatus and method for noise-predictive maximum likelihood detection |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1998052330A1 true WO1998052330A1 (en) | 1998-11-19 |
Family
ID=11004566
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB1997/000554 WO1998052330A1 (en) | 1997-05-15 | 1997-05-15 | Apparatus and method for noise-predictive maximum likelihood detection |
Country Status (5)
Country | Link |
---|---|
US (1) | US6625235B1 (en) |
EP (1) | EP0981880B1 (en) |
JP (1) | JP3540329B2 (en) |
DE (1) | DE69723477T2 (en) |
WO (1) | WO1998052330A1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003019889A2 (en) * | 2001-08-24 | 2003-03-06 | Infineon Technologies Ag | Data reconstruction in a receiver |
US6661858B1 (en) * | 2000-09-12 | 2003-12-09 | Beaudin Andre | DC restoration circuit for a radio receiver |
US7369813B2 (en) | 2003-05-14 | 2008-05-06 | Telefonaktiebolaget L M Ericsson (Publ) | Fast calibration of electronic components |
Families Citing this family (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6763061B1 (en) * | 2000-07-31 | 2004-07-13 | 3Com Corporation | Frequency domain technique for narrowband noise cancellation in DMT receivers |
JP4324316B2 (en) * | 2000-10-23 | 2009-09-02 | 株式会社日立グローバルストレージテクノロジーズ | Perpendicular magnetic recording / reproducing device |
JPWO2003012789A1 (en) * | 2001-07-27 | 2004-11-25 | 富士通株式会社 | Signal processing method, signal processing circuit and information recording / reproducing device |
US20030156635A1 (en) * | 2002-02-20 | 2003-08-21 | Fernandez-Corbaton Ivan Jesus | Adaptive filtering with DC bias compensation |
US20030185292A1 (en) * | 2002-04-02 | 2003-10-02 | Fernandez-Corbaton Ivan Jesus | Adaptive filtering with DC bias compensation |
US7139146B2 (en) * | 2002-05-28 | 2006-11-21 | Sony Corporation | Signal processing apparatus and method, and digital data reproducing apparatus |
DE10251288B4 (en) * | 2002-11-04 | 2005-08-11 | Advanced Micro Devices, Inc., Sunnyvale | Equalizer circuit with notch compensation for a direct mix receiver |
US7116504B1 (en) | 2003-03-25 | 2006-10-03 | Marvell International Ltd. | DC-offset compensation loops for magnetic recording system |
US7289568B2 (en) * | 2003-11-19 | 2007-10-30 | Intel Corporation | Spectrum management apparatus, method, and system |
US7545862B2 (en) * | 2004-02-16 | 2009-06-09 | Sony Corporation | Adaptive equalizer, decoding device, and error detecting device |
US7522680B2 (en) * | 2005-02-09 | 2009-04-21 | International Business Machines Corporation | Apparatus, system, and method for asymmetric maximum likelihood detection |
US7561640B2 (en) * | 2005-04-08 | 2009-07-14 | Seagate Technology Llc | Method and apparatus for interative noise whitening with causal and anti-causal prediction filters |
US7394608B2 (en) * | 2005-08-26 | 2008-07-01 | International Business Machines Corporation | Read channel apparatus for asynchronous sampling and synchronous equalization |
US7522367B2 (en) * | 2005-11-23 | 2009-04-21 | International Business Machines Corporation | Asynchronous read channel shaped toward generalized partial response characteristics |
US8976913B2 (en) * | 2008-09-17 | 2015-03-10 | Lsi Corporation | Adaptive pattern dependent noise prediction on a feed forward noise estimate |
US20110090779A1 (en) * | 2009-10-16 | 2011-04-21 | Mediatek Inc. | Apparatus for generating viterbi-processed data |
US20110167323A1 (en) * | 2010-01-07 | 2011-07-07 | Mediatek Inc. | Error-Correcting Apparatus and Method Thereof |
US8670199B2 (en) | 2010-04-02 | 2014-03-11 | International Business Machines Corporation | Data-dependent noise-predictive maximum likelihood detection (DD-NPML) for magnetic recording |
US8248903B2 (en) * | 2010-04-21 | 2012-08-21 | Mediatek Inc. | Decoding apparatus and method thereof |
RU2012102842A (en) | 2012-01-27 | 2013-08-10 | ЭлЭсАй Корпорейшн | INCREASE DETECTION OF THE PREAMBLE |
CN107276936B (en) | 2011-10-27 | 2020-12-11 | 英特尔公司 | Block-based Crest Factor Reduction (CFR) |
US8432780B1 (en) | 2012-05-10 | 2013-04-30 | Mediatek Inc. | Viterbi decoding apparatus using level information generator supporting different hardware configurations to generate level information to Viterbi decoder and related method thereof |
US8797670B2 (en) | 2012-06-19 | 2014-08-05 | International Business Machines Corporation | Adaptive soft-output detector for magnetic tape read channels |
US8743499B2 (en) | 2012-06-19 | 2014-06-03 | International Business Machines Corporation | Adaptive soft-output detector for magnetic tape read channels |
US8743500B2 (en) | 2012-06-19 | 2014-06-03 | International Business Machines Corporation | Adaptive soft-output detector for magnetic tape read channels |
US8743498B2 (en) | 2012-06-19 | 2014-06-03 | International Business Machines Corporation | Adaptive soft-output detector for magnetic tape read channels |
US9129610B2 (en) * | 2012-08-21 | 2015-09-08 | Bose Corporation | Filtering for detection of limited-duration distortion |
US9923595B2 (en) | 2013-04-17 | 2018-03-20 | Intel Corporation | Digital predistortion for dual-band power amplifiers |
US9813223B2 (en) | 2013-04-17 | 2017-11-07 | Intel Corporation | Non-linear modeling of a physical system using direct optimization of look-up table values |
US9318147B1 (en) * | 2013-10-10 | 2016-04-19 | Seagate Technology Llc | Read read-only fields while writing |
US8947812B1 (en) | 2014-03-27 | 2015-02-03 | Western Digital Technologies, Inc. | Data storage device comprising equalizer filter and inter-track interference filter |
US9183877B1 (en) | 2015-03-20 | 2015-11-10 | Western Digital Technologies, Inc. | Data storage device comprising two-dimensional data dependent noise whitening filters for two-dimensional recording |
US11831473B2 (en) * | 2022-03-28 | 2023-11-28 | Credo Technology Group Limited | Reduced-complexity maximum likelihood sequence detector suitable for m-ary signaling |
US11831475B1 (en) * | 2022-06-10 | 2023-11-28 | Credo Technology Group Limited | Receiver using pseudo partial response maximum likelihood sequence detection |
US11862194B1 (en) | 2022-12-01 | 2024-01-02 | International Business Machines Corporation | Adaptive data detection on a nonlinear channel |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997011544A1 (en) * | 1995-09-18 | 1997-03-27 | International Business Machines Corporation | Apparatus and method for noise-predictive maximum-likelihood (npml) detection |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2623638B2 (en) | 1988-02-25 | 1997-06-25 | 松下電器産業株式会社 | Decryption device |
US5115452A (en) * | 1990-08-02 | 1992-05-19 | At&T Bell Laboratories | Phase jitter correction arrangement |
JP2932830B2 (en) | 1991-05-29 | 1999-08-09 | 日本電気株式会社 | Adaptive equalizer for nonlinear distortion equalization |
JPH057128A (en) | 1991-06-27 | 1993-01-14 | Nec Corp | Equalizer |
US5818876A (en) * | 1993-02-01 | 1998-10-06 | Motorola, Inc. | Method and apparatus of adaptive maximum likelihood sequence estimation using a variable convergence step size |
US5784415A (en) * | 1993-06-14 | 1998-07-21 | International Business Machines Corporation | Adaptive noise-predictive partial-response equalization for channels with spectral nulls |
JPH076511A (en) | 1993-06-21 | 1995-01-10 | Matsushita Electric Ind Co Ltd | Equalizing/decoding device |
JPH0715355A (en) | 1993-06-25 | 1995-01-17 | Matsushita Electric Ind Co Ltd | Equalization and decoding system |
JPH0738614A (en) | 1993-07-23 | 1995-02-07 | Matsushita Electric Ind Co Ltd | Digital information detector and magnetic reproducing device |
JPH08307283A (en) * | 1995-03-09 | 1996-11-22 | Oki Electric Ind Co Ltd | Device and method for estimating maximum likelihood series |
US6029058A (en) * | 1996-07-19 | 2000-02-22 | The Board Of Trustee Of The Leland Stanford Junior University | Spectrum control for direct conversion radio frequency reception |
-
1997
- 1997-05-15 WO PCT/IB1997/000554 patent/WO1998052330A1/en active IP Right Grant
- 1997-05-15 JP JP54896098A patent/JP3540329B2/en not_active Expired - Fee Related
- 1997-05-15 DE DE69723477T patent/DE69723477T2/en not_active Expired - Lifetime
- 1997-05-15 EP EP97918303A patent/EP0981880B1/en not_active Expired - Lifetime
- 1997-05-15 US US09/403,628 patent/US6625235B1/en not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997011544A1 (en) * | 1995-09-18 | 1997-03-27 | International Business Machines Corporation | Apparatus and method for noise-predictive maximum-likelihood (npml) detection |
Non-Patent Citations (3)
Title |
---|
CHEVILLAT P R ET AL: "NOISE-PREDICTIVE PARTIAL-RESPONSE EQUALIZERS AND APPLICATIONS", INTERNATIONAL CONFERENCE ON COMMUNICATIONS, ICC'92, CHICAGO, US, vol. 2 OF 4, 14 June 1992 (1992-06-14) - 18 June 1992 (1992-06-18), INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, pages 942 - 947, XP000326811 * |
DUEL-HALLEN A ET AL: "DELAYED DECISION-FEEDBACK SEQUENCE ESTIMATION", IEEE TRANSACTIONS ON COMMUNICATIONS, vol. 37, no. 5, May 1989 (1989-05-01), pages 428 - 436, XP000670554 * |
MOHAMMAD GHAVAMI ET AL: "DECISION FEEDBACK EQUALIZATION OF HDSL USING A GENERALIZED ADAPTIVE IIR DELAY FILTER", EUROPEAN TRANSACTIONS ON TELECOMMUNICATIONS AND RELATED TECHNOLOGIES, vol. 5, no. 3, 1 May 1994 (1994-05-01), pages 37/337 - 46/346, XP000456626 * |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6661858B1 (en) * | 2000-09-12 | 2003-12-09 | Beaudin Andre | DC restoration circuit for a radio receiver |
WO2003019889A2 (en) * | 2001-08-24 | 2003-03-06 | Infineon Technologies Ag | Data reconstruction in a receiver |
WO2003019889A3 (en) * | 2001-08-24 | 2003-12-11 | Infineon Technologies Ag | Data reconstruction in a receiver |
US7095803B2 (en) | 2001-08-24 | 2006-08-22 | Infineon Technologies Ag | Method of reconstructing data transmitted over a transmission path in a receiver and corresponding device |
DE10141597B4 (en) * | 2001-08-24 | 2017-11-09 | Lantiq Deutschland Gmbh | Method for reconstructing data transmitted over a transmission link in a receiver and corresponding device |
US7369813B2 (en) | 2003-05-14 | 2008-05-06 | Telefonaktiebolaget L M Ericsson (Publ) | Fast calibration of electronic components |
Also Published As
Publication number | Publication date |
---|---|
EP0981880A1 (en) | 2000-03-01 |
JP2000513182A (en) | 2000-10-03 |
DE69723477D1 (en) | 2003-08-14 |
DE69723477T2 (en) | 2004-05-27 |
US6625235B1 (en) | 2003-09-23 |
EP0981880B1 (en) | 2003-07-09 |
JP3540329B2 (en) | 2004-07-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0981880B1 (en) | Apparatus and method for noise-predictive maximum likelihood detection | |
KR100288672B1 (en) | Apparatus and method for noise-predictive maximum-likelihood (npml) detection | |
Coker et al. | Noise-predictive maximum likelihood (NPML) detection | |
US5889823A (en) | Method and apparatus for compensation of linear or nonlinear intersymbol interference and noise correlation in magnetic recording channels | |
US5619539A (en) | Data detection methods and apparatus for a direct access storage device | |
US5521945A (en) | Reduced complexity EPR4 post-processor for sampled data detection | |
US5343335A (en) | Signal processing system having intersymbol-interference cancelling means and method of same | |
KR980011304A (en) | Sampled amplitude read channel and binary data read method | |
US5606464A (en) | Cancellation of precursor intersymbol interference in magnetic recording channels | |
US6460150B1 (en) | Noise-predictive post-processing for PRML data channel | |
US6028728A (en) | Sampled amplitude read/write channel employing a sub-baud rate write clock | |
Eleftheriou et al. | Noise-predictive maximum-likelihood (NPML) detection for the magnetic recording channel | |
JP4199907B2 (en) | Perpendicular magnetic recording / reproducing apparatus and signal processing circuit | |
Eleftheriou et al. | Improving performance of PRML/EPRML through noise prediction | |
US5931966A (en) | Viterbi detector with a pipelined look-up table of squared errors | |
Kenney et al. | Multi-level decision feedback equalization: An efficient realization of FDTS/DF | |
JPWO2005024822A1 (en) | Reproduction signal processing apparatus and reproduction signal processing method | |
EP0891059B1 (en) | Sequence estimation for partial response channels | |
JPH09330564A (en) | Digital information reproducing equipment | |
JP4189747B2 (en) | Signal processing device | |
Kurtas et al. | Detection methods for data-dependent noise in storage channels | |
JP3395716B2 (en) | Digital signal reproduction device | |
JP4200113B2 (en) | Equalizer and magnetic recording / reproducing apparatus | |
Mathew et al. | Constrained equalizer design for MDFE detection on the magnetic recording channel | |
Fisher et al. | Signal processing for 10 GB/in. 2 magnetic disk recording and beyond |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): JP US |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): AT BE CH DE DK ES FI FR GB GR IE IT LU MC NL PT SE |
|
DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 1997918303 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 09403628 Country of ref document: US |
|
ENP | Entry into the national phase |
Ref country code: JP Ref document number: 1998 548960 Kind code of ref document: A Format of ref document f/p: F |
|
NENP | Non-entry into the national phase |
Ref country code: CA |
|
WWP | Wipo information: published in national office |
Ref document number: 1997918303 Country of ref document: EP |
|
WWG | Wipo information: grant in national office |
Ref document number: 1997918303 Country of ref document: EP |