US20060181975A1 - Cross-talk cancellation scheme for rll-based storage systems - Google Patents
Cross-talk cancellation scheme for rll-based storage systems Download PDFInfo
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- US20060181975A1 US20060181975A1 US10/552,059 US55205905A US2006181975A1 US 20060181975 A1 US20060181975 A1 US 20060181975A1 US 55205905 A US55205905 A US 55205905A US 2006181975 A1 US2006181975 A1 US 2006181975A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
- H04W52/04—TPC
- H04W52/30—TPC using constraints in the total amount of available transmission power
- H04W52/34—TPC management, i.e. sharing limited amount of power among users or channels or data types, e.g. cell loading
- H04W52/343—TPC management, i.e. sharing limited amount of power among users or channels or data types, e.g. cell loading taking into account loading or congestion level
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
- H04W52/04—TPC
- H04W52/30—TPC using constraints in the total amount of available transmission power
- H04W52/34—TPC management, i.e. sharing limited amount of power among users or channels or data types, e.g. cell loading
- H04W52/346—TPC management, i.e. sharing limited amount of power among users or channels or data types, e.g. cell loading distributing total power among users or channels
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
- H04W52/04—TPC
- H04W52/18—TPC being performed according to specific parameters
- H04W52/26—TPC being performed according to specific parameters using transmission rate or quality of service QoS [Quality of Service]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
- H04W52/04—TPC
- H04W52/18—TPC being performed according to specific parameters
- H04W52/28—TPC being performed according to specific parameters using user profile, e.g. mobile speed, priority or network state, e.g. standby, idle or non transmission
- H04W52/286—TPC being performed according to specific parameters using user profile, e.g. mobile speed, priority or network state, e.g. standby, idle or non transmission during data packet transmission, e.g. high speed packet access [HSPA]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
- H04W52/04—TPC
- H04W52/30—TPC using constraints in the total amount of available transmission power
- H04W52/32—TPC of broadcast or control channels
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
- H04W52/04—TPC
- H04W52/52—TPC using AGC [Automatic Gain Control] circuits or amplifiers
Definitions
- the present invention relates to a cross-talk cancellation method, a computer program for implementing a cross-talk cancellation method, a signal processor comprising cross-talk cancellation means, and an apparatus for reading a signal stored along a track on a storage medium, said apparatus comprising cross-talk cancellation means.
- the present invention relates to storage systems in which data are stored along tracks on a storage medium.
- the inter-track spacing is chosen relatively small to allow for high storage densities.
- This inter-track interference is called cross-talk.
- the invention is advantageously used in such storage systems to improve the recovered signal by removing the cross-talk.
- the invention applies to optical storage systems (DVD, Blu-ray Disc, Small Form Factor Optical Disc . . . ), magnetic storage systems (hard disks notably), magneto-optical storage systems.
- the cross-talk is even more severe when radial tilt is present in the system because then the optical spot extends more onto the side tracks.
- a cross-talk removing device is described in U.S. Pat. No. 6,134,211. This device has three reading elements simultaneously reading a main track and two adjacent tracks. The three signals that are read by the three reading elements are sampled so as to provide three sequences of samples.
- a cross-talk removing circuit applies adaptive signal processing (for example an LMS adaptive algorithm) to the three sequences of samples to produce a cross-talk-removed sequence of samples associated with the main track that is free of cross-talk components from the adjacent tracks.
- adaptive signal processing for example an LMS adaptive algorithm
- the adaptive processing comprises an adaptive filtering, the filter coefficients being updated so as to converge to zero an error value present in the cross-talk-removed sequence of samples.
- This convergence is achieved by using a reference sample extracting circuit.
- the reference sample extracting circuit extracts the central sample value of three successive sample values.
- the extracted sample value is supplied to a subtractor that calculates the difference between the extracted sample value and a reference value. This difference is used as the error (e) that has to be converged to zero to update the filter coefficients.
- Another problem of the prior art system is that it is hardly compatible with asynchronous receiver architectures.
- the analog-to-digital converters and the filters are run on a fixed clock.
- a transition from the fixed clock domain to the bit-synchronous domain is done at the output of the cross-talk cancellation circuit by means of a sample rate converter controlled by a time recovery circuit.
- An additional sample rate controller, locked to the time recovery circuit, would be needed for each adjacent track to produce the bit-synchronous samples that are needed to derive the above-described error (e).
- One of the objects of the invention is to propose a solution for cross-talk cancellation that solves the above-mentioned problems.
- the cross-talk cancellation means according to the invention are intended for receiving a main signal associated with a target track and satellite signals associated with side tracks, said main signal showing transitions and runs of various lengths between two transitions. They comprise:
- filtering means for filtering the satellite signals with adaptive filters, thereby generating filtered versions of the satellite signals
- updating means for updating the coefficients of the adaptive filters by minimizing the mismatch between the actual and the expected run length between two transitions of the main signal
- processing means for generating an improved main signal from said main signal by subtraction of said filtered versions of the satellite signals.
- the error that is to be minimized when updating the filter coefficients is the mismatch between the actual and the expected run length between two transitions of the main signal.
- the minimization scheme of the invention does not use the notion of ideal transition time. Therefore it does not require the use of bit-synchronous samples.
- the proposed minimization scheme requires frequency lock but not phase lock.
- a first advantage of the proposed minimization scheme is that it resolves the above-mentioned ramp-up problem.
- a second advantage of the proposed minimization scheme is that it can be implemented in an asynchronous architecture without any additional hardware complexity.
- the cross-talk cancellation means of the invention are operated at a fixed clock that is asynchronous with respect to this bit-clock.
- bit clock frequency is different from the fixed clock frequency
- additional time recovery means are provided to derive the ratio between the bit clock frequency and the fixed clock frequency, said ratio being used by said updating means for updating said coefficients.
- FIGS. 1 and 2 are functional block diagrams of examples of an apparatus according to the invention for reading a storage medium
- FIGS. 3 and 4 are schematic representations of a first and a second configuration of tracks and light spots used in a 3-spot cross-talk cancellation scheme
- FIG. 5 is a functional block diagram of the cross-talk cancellation means according to the invention.
- FIG. 6 is a schematic representation of a received signal showing two transitions and a run between the two transitions.
- the invention applies to storage media having tracks each forming a 360° turn of a spiral line.
- Encoded data are recorded along the tracks.
- the encoding scheme that is used in optical recording system is a Run Length Limited encoding scheme (RLL).
- RLL Run Length Limited encoding scheme
- the tracks exhibit marks corresponding to runs of a same value, and the edges of a mark correspond to a transition between two runs.
- the size of the mark corresponds to the length of the run. It is an integer multiple of a reference unit size mark.
- FIGS. 1 and 2 show block diagrams of a first and a second example of an apparatus for reading such a disc.
- the apparatus shown in FIG. 1 carries reference number 6 - 1 .
- the apparatus of FIG. 2 carries reference number 6 - 2 .
- the apparatuses 6 - 1 and 6 - 2 comprise an optical unit 8 having three reading elements: a main reading element 12 for reading a main signal associated with a main track, and two satellite reading elements 11 and 13 for reading two satellite signals associated with the two tracks that are adjacent to the main track.
- a main reading element 12 for reading a main signal associated with a main track
- two satellite reading elements 11 and 13 for reading two satellite signals associated with the two tracks that are adjacent to the main track.
- one of these satellite signal is called upper satellite signal
- the other satellite signal is called lower satellite signal.
- the three reading elements transmit three light spots 21 , 22 and 23 .
- FIGS. 3 and 4 show the locations of the three light spots 21 , 22 and 23 with respect to the three tracks to be read 31 , 32 and 33 .
- the main light spot 22 is centered on the main track 32 .
- the satellite light spots 21 and 23 may be centered either on the satellite tracks 31 and 33 as represented in FIG. 3 , or between the main track 32 and the adjacent tracks 31 and 33 as represented in FIG. 4 .
- the satellite signals read by the satellite light spots 21 and 23 in FIGS. 3 and 4 are said to be “associated with” the adjacent tracks because the light spots 21 and 23 overlap with at least part of the adjacent tracks.
- FIG. 4 is advantageous for rewritable optical disc systems because it allows reusing the 3-spot push-pull radial tracking means which are currently available in all such systems (the signal read by the reading elements 11 , 12 and 13 and the main light spots 21 , 22 and 23 can be used both for tracking and for cross-talk cancellation).
- the three signals that are read by the three reading elements 11 , 12 and 13 are input to a signal processor 40 comprising cross-talk cancellation means 42 and decoding means 44 .
- the signal produced by the decoding means 44 is input to a reproduction circuit 46 that generates an output signal (for example an audio or a video signal).
- FIG. 5 is a functional representation of the cross-talk cancellation means 42 .
- the cross-talk cancellation means 42 comprise three analog-to-digital converters 51 , 52 and 53 for sampling the main signal, the upper satellite signal and the lower satellite signal.
- the three analog-to-digital converters 51 , 52 and 53 operate at a fixed clock 55 and generate a sequence of main samples 62 , a sequence of lower satellite samples 61 , and a sequence of upper satellite samples 63 .
- the sequences of lower and upper satellite samples 61 and 63 are processed by a lower adaptive filter 71 and an upper adaptive filter 73 , respectively, which generate a filtered version 81 of the sequence of lower satellite samples and a filtered version 83 of the sequence of upper satellite samples.
- the sequence 62 of main samples is processed by an optional equalizer 90 , which generates an equalized sequence of main samples 92 . Then a subtractor 93 subtracts the filtered version 81 of the sequence of lower satellite samples and a filtered version 83 of the sequence of upper satellite samples from the equalized sequence 92 of main samples, thereby generating an improved sequence of main samples 102 .
- the improved sequence of main samples 102 is generated by subtraction of the filtered version 81 of the sequence of lower satellite samples and a filtered version 83 of the sequence of upper satellite samples from the sequence 62 of main samples.
- the improved sequence of main samples 102 is input to a sample rate converter 120 driven by a time recovery circuit 130 (for example a Phase Lock Loop circuit).
- the output of the sample rate converter 120 is the input of the decoding means 44 .
- the improved sequence of main samples 102 and the sequences of lower and upper satellite samples 61 and 63 are processed by lower and upper coefficient updating means 111 and 113 .
- the lower and upper coefficient updating means 111 and 113 update the respectively coefficients used by the lower filter 71 and by the upper filter 73 .
- C ⁇ m C m - ⁇ k ⁇ f k + ⁇ S m - k + - ⁇ k ⁇ f k - ⁇ S m - k - ( equation ⁇ ⁇ 1 )
- S m + is the sample m of the upper satellite signal
- S m ⁇ is the sample m of the lower satellite signal
- C m is the sample m of the main signal
- f k + are the coefficients of the upper filter
- f k ⁇ are the coefficients of the lower filter
- ⁇ tilde over (C) ⁇ m is the improved main sample m obtained at the output the subtractor 93 .
- the algorithm used to update the filter coefficients is the LMS algorithm (Least Mean Square).
- the ratio ⁇ between the PLL-driven bit clock and the fixed clock that runs the analog-to-digital converters 51 , 52 and 53 must be available.
- two arrows 141 and 143 indicate that the frequency ratio ⁇ is supplied to the first and second coefficient updating means 111 and 113 .
- the arrows 141 and 143 are represented in dashed lines because they may be omitted if the frequency ratio ⁇ is equal to 1.
- the ratio ⁇ is advantageously supplied by a time recovery circuit external to the cross-talk cancellation means 42 and specifically designed for fast approximate recovery of the bit frequency.
- a time recovery circuit external to the cross-talk cancellation means 42 and specifically designed for fast approximate recovery of the bit frequency.
- Such an external time recovery circuit is already present in most reading apparatuses.
- FIG. 1 gives an example of an implementation that will be advantageously used in such systems: in FIG. 1 , the external time recovery circuit carries reference number 50 - 1 and is connected In the path between the main reading element 12 and the cross-talk cancellation means 42 . In other systems (mostly in ROM systems), average run length measurements can be used for the same purpose.
- FIG. 2 gives an example of an implementation that will be advantageously used in such systems: in FIG. 2 , the external time recovery circuit carries reference number 50 - 2 and is connected In the path between the cross-talk cancellation means 42 and the decoding means 44 .
- FIG. 5 is a schematic representation of the received main signal. Two successive transitions X m and X m+1 , are represented.
- ⁇ tilde over (C) ⁇ (m,L) is the improved main sample on the left of the transition X m ;
- ⁇ tilde over (C) ⁇ (m,R) is the improved main sample on the right of the transition X m ;
- ⁇ tilde over (C) ⁇ (m+1,L) is the improved main sample on the left of the transition X m+1 ;
- ⁇ tilde over (C) ⁇ (m+1,R) is the improved main sample on the right of the transition X m+1 ;
- ⁇ tilde over (C) ⁇ (m,L)+1 is the improved main sample that precedes sample ⁇ tilde over (C) ⁇ (m,L) ;
- ⁇ tilde over (C) ⁇ (m,L)+1 is the improved main sample that follows sample ⁇ tilde over (C) ⁇ (m,L) ;
- ⁇ tilde over (C) ⁇ (m,R) ⁇ 1 is the improved main sample that precedes sample ⁇ tilde over (C) ⁇ (m,R) ;
- ⁇ tilde over (C) ⁇ (m,R)+1 is the improved main sample that follows sample ⁇ tilde over (C) ⁇ (m,R) ;
- ⁇ m is the time interval between the ideal time of the transition X m and the actual time of the transition X m (in FIG. 5 , ⁇ m ⁇ 0);
- ⁇ m+1 is the time interval between the ideal time of the transition X m+1 and the actual time of the transition X m+1 (in FIG. 5 , ⁇ m+1 ⁇ 0);
- d m+1,m is the actual run length between the two transitions X m and X m+1 .
- time interval ⁇ m takes values from the interval [ - 1 2 , + 1 2 ] .
- This first implementation is applicable when the fixed system clock is (nearly) equal to the PLL driven bit clock (that is when the ratio ⁇ is close to 1), but there is no phase lock between the two clocks.
- the LMS driving parameter to be minimized Z m is chosen to be equal to the difference between the actual run length d m+1,m and the expected run length d m+1,m (exp) .
- the time interval ⁇ m can be computed approximately as a function g m of the improved main samples: ⁇ m ⁇ g m ( ⁇ tilde over (C) ⁇ (m,L) , ⁇ tilde over (C) ⁇ (m,L) ⁇ 1 , . . . , ⁇ tilde over (C) ⁇ (m,L) ⁇ N L , ⁇ tilde over (C) ⁇ (m,R) ⁇ 1 , . . .
- the LMS driving parameter to be minimized Z m is also chosen to be equal to the difference between the actual run length d m+1,m and the expected run length d m+1,m (exp) , but the mathematical formulae used for computing d m+1,m , ⁇ m and ⁇ m+1 have to be modified so as to take into account the frequency ratio ⁇ .
- the first and second implementations that were described are based on a simple 2-term linear approximation for the calculation of the time intervals ⁇ m and ⁇ m+1 .
- This is not restrictive.
- Other approximations can be used.
- a linear approximation using more than 2 terms may be used.
- the LMS updating scheme for these other approximations can be derived in a similar fashion as for the 2-term linear approximation.
- the minimization algorithm used in the above described implementations is the LMS algorithm. This is not restrictive. Other minimization algorithms may be used to minimize Z m .
- the corresponding coefficient updating equations may be readily derived by using the same principles as those described above for the LMS algorithm.
- the main signal is equalized.
- the main signal may be processed by an adaptive filter in a similar fashion as the lower and upper satellite signal.
- FIGS. 1, 2 and 5 are functional representations of an apparatus and a signal processor according to the invention. A hardware implementation thereof may differ from this functional block representation.
Abstract
The invention relates to Run length Limited-codes storage systems. In modern storage systems, the inter-track spacing is chosen to be relatively small to allow for high storage densities. As a result, when reading a target track, data written on side tracks may appear in the recovered signal. This inter-track interference is called cross-talk. The invention proposes a cross-talk cancellation scheme based on the minimization of the mismatch between the actual (dm+1m) and the expected (exp) run length between two transitions (xm, xm+1) of the (dm+1,m) signal. The proposed solution significantly improves the ramp-up properties of the receiver and allows more efficient hardware implementation.
Description
- The present invention relates to a cross-talk cancellation method, a computer program for implementing a cross-talk cancellation method, a signal processor comprising cross-talk cancellation means, and an apparatus for reading a signal stored along a track on a storage medium, said apparatus comprising cross-talk cancellation means.
- The present invention relates to storage systems in which data are stored along tracks on a storage medium. In modern storage systems, the inter-track spacing is chosen relatively small to allow for high storage densities. As a result, when reading a target track, data written on side tracks may appear in the recovered signal. This inter-track interference is called cross-talk.
- The invention is advantageously used in such storage systems to improve the recovered signal by removing the cross-talk. For example, the invention applies to optical storage systems (DVD, Blu-ray Disc, Small Form Factor Optical Disc . . . ), magnetic storage systems (hard disks notably), magneto-optical storage systems.
- With optical storage systems, the cross-talk is even more severe when radial tilt is present in the system because then the optical spot extends more onto the side tracks.
- A cross-talk removing device is described in U.S. Pat. No. 6,134,211. This device has three reading elements simultaneously reading a main track and two adjacent tracks. The three signals that are read by the three reading elements are sampled so as to provide three sequences of samples. A cross-talk removing circuit applies adaptive signal processing (for example an LMS adaptive algorithm) to the three sequences of samples to produce a cross-talk-removed sequence of samples associated with the main track that is free of cross-talk components from the adjacent tracks.
- The adaptive processing comprises an adaptive filtering, the filter coefficients being updated so as to converge to zero an error value present in the cross-talk-removed sequence of samples.
- This convergence is achieved by using a reference sample extracting circuit. When the values of three successive samples transit from positive to negative or from negative to positive, the reference sample extracting circuit extracts the central sample value of three successive sample values. The extracted sample value is supplied to a subtractor that calculates the difference between the extracted sample value and a reference value. This difference is used as the error (e) that has to be converged to zero to update the filter coefficients.
- In this scheme it is assumed that the central sample value is the sample value at ideal zero-crossing time. This assumption can only be made if the samples are bit-synchronous samples.
- In U.S. Pat. No. 6,134,211 this is achieved by running the analog-to-digital converters and the cross-talk removing circuit on a clock that is driven by a time recovery circuit. As a consequence, the cross-talk cancelling scheme is only operational when the time recovery circuit has acquired both the frequency and the phase lock.
- In U.S. Pat. No. 6,134,211, when the sample sequences remain in an asynchronous state (that is, when the time recovery circuit is not locked), the sequences are filtered on the basis of fixed predetermined coefficients. This helps to avoid divergence of the filter coefficients but leads to a ramp-up problem: if the time recovery circuit cannot converge because of strong cross-talk, the cross-talk cancellation scheme will remain inefficient and the system will be stuck.
- Another problem of the prior art system is that it is hardly compatible with asynchronous receiver architectures.
- In such asynchronous architectures, the analog-to-digital converters and the filters are run on a fixed clock. A transition from the fixed clock domain to the bit-synchronous domain is done at the output of the cross-talk cancellation circuit by means of a sample rate converter controlled by a time recovery circuit. An additional sample rate controller, locked to the time recovery circuit, would be needed for each adjacent track to produce the bit-synchronous samples that are needed to derive the above-described error (e).
- Moreover, if the fixed clock (at which the filters are running) and the clock driven by the time recovery circuit (at which the filters coefficients are updated) differ substantially from each other, inverse sample rate converters would also be required to interpolate the filter coefficients from the domain of the clock driven by the time recovery circuit to the domain of the fixed clock.
- This would lead to an increased complexity of the architecture.
- One of the objects of the invention is to propose a solution for cross-talk cancellation that solves the above-mentioned problems.
- This is achieved with a cross-talk cancellation method as claimed in
claim 1, a program as claimed in claim 2, a signal processor comprising cross-talk cancellation means as claimed in claims 3 to 5, and an apparatus for reading a signal stored along a track on a storage medium as claimed in claims 6 to 8. - The cross-talk cancellation means according to the invention are intended for receiving a main signal associated with a target track and satellite signals associated with side tracks, said main signal showing transitions and runs of various lengths between two transitions. They comprise:
- filtering means for filtering the satellite signals with adaptive filters, thereby generating filtered versions of the satellite signals,
- updating means for updating the coefficients of the adaptive filters by minimizing the mismatch between the actual and the expected run length between two transitions of the main signal,
- processing means for generating an improved main signal from said main signal by subtraction of said filtered versions of the satellite signals.
- According to the invention the error that is to be minimized when updating the filter coefficients is the mismatch between the actual and the expected run length between two transitions of the main signal. Contrary to the prior art minimization scheme, the minimization scheme of the invention does not use the notion of ideal transition time. Therefore it does not require the use of bit-synchronous samples. The proposed minimization scheme requires frequency lock but not phase lock.
- A first advantage of the proposed minimization scheme is that it resolves the above-mentioned ramp-up problem.
- A second advantage of the proposed minimization scheme is that it can be implemented in an asynchronous architecture without any additional hardware complexity.
- Advantageously, when used in an asynchronous receiver having a bit clock that is driven by a time recovery circuit, the cross-talk cancellation means of the invention are operated at a fixed clock that is asynchronous with respect to this bit-clock.
- In such a case, if the bit clock frequency is different from the fixed clock frequency, additional time recovery means are provided to derive the ratio between the bit clock frequency and the fixed clock frequency, said ratio being used by said updating means for updating said coefficients.
- These and other aspects of the invention will be further described with reference to the following drawings:
-
FIGS. 1 and 2 are functional block diagrams of examples of an apparatus according to the invention for reading a storage medium; -
FIGS. 3 and 4 are schematic representations of a first and a second configuration of tracks and light spots used in a 3-spot cross-talk cancellation scheme; -
FIG. 5 is a functional block diagram of the cross-talk cancellation means according to the invention; -
FIG. 6 is a schematic representation of a received signal showing two transitions and a run between the two transitions. - The invention applies to storage media having tracks each forming a 360° turn of a spiral line. Encoded data are recorded along the tracks. The encoding scheme that is used in optical recording system is a Run Length Limited encoding scheme (RLL). When the data recorded along the tracks are encoded with an RLL encoding scheme, the tracks exhibit marks corresponding to runs of a same value, and the edges of a mark correspond to a transition between two runs. The size of the mark corresponds to the length of the run. It is an integer multiple of a reference unit size mark.
-
FIGS. 1 and 2 show block diagrams of a first and a second example of an apparatus for reading such a disc. The apparatus shown inFIG. 1 carries reference number 6-1. The apparatus ofFIG. 2 carries reference number 6-2. According toFIGS. 1 and 2 , the apparatuses 6-1 and 6-2 comprise anoptical unit 8 having three reading elements: amain reading element 12 for reading a main signal associated with a main track, and twosatellite reading elements light spots -
FIGS. 3 and 4 show the locations of the threelight spots light spot 22 is centered on themain track 32. The satellite light spots 21 and 23 may be centered either on the satellite tracks 31 and 33 as represented inFIG. 3 , or between themain track 32 and theadjacent tracks FIG. 4 . The satellite signals read by the satellite light spots 21 and 23 inFIGS. 3 and 4 are said to be “associated with” the adjacent tracks because the light spots 21 and 23 overlap with at least part of the adjacent tracks. - The embodiment of
FIG. 4 is advantageous for rewritable optical disc systems because it allows reusing the 3-spot push-pull radial tracking means which are currently available in all such systems (the signal read by thereading elements - Returning to
FIGS. 1 and 2 , the three signals that are read by the threereading elements signal processor 40 comprising cross-talk cancellation means 42 and decoding means 44. The signal produced by the decoding means 44 is input to areproduction circuit 46 that generates an output signal (for example an audio or a video signal). -
FIG. 5 is a functional representation of the cross-talk cancellation means 42. The cross-talk cancellation means 42 comprise three analog-to-digital converters digital converters clock 55 and generate a sequence ofmain samples 62, a sequence oflower satellite samples 61, and a sequence ofupper satellite samples 63. The sequences of lower andupper satellite samples adaptive filter 71 and an upperadaptive filter 73, respectively, which generate a filtered version 81 of the sequence of lower satellite samples and a filteredversion 83 of the sequence of upper satellite samples. Thesequence 62 of main samples is processed by anoptional equalizer 90, which generates an equalized sequence ofmain samples 92. Then asubtractor 93 subtracts the filtered version 81 of the sequence of lower satellite samples and a filteredversion 83 of the sequence of upper satellite samples from the equalizedsequence 92 of main samples, thereby generating an improved sequence ofmain samples 102. - Alternatively, if the
equalizer 90 is omitted, the improved sequence ofmain samples 102 is generated by subtraction of the filtered version 81 of the sequence of lower satellite samples and a filteredversion 83 of the sequence of upper satellite samples from thesequence 62 of main samples. - The improved sequence of
main samples 102 is input to asample rate converter 120 driven by a time recovery circuit 130 (for example a Phase Lock Loop circuit). The output of thesample rate converter 120 is the input of the decoding means 44. - The improved sequence of
main samples 102 and the sequences of lower andupper satellite samples lower filter 71 and by theupper filter 73. - The behaviour of the cross-talk cancellation means 42 can be formalized by the following mathematical expression:
where:
Sm + is the sample m of the upper satellite signal;
Sm − is the sample m of the lower satellite signal;
Cm is the sample m of the main signal;
fk + are the coefficients of the upper filter and fk − are the coefficients of the lower filter;
{tilde over (C)}m is the improved main sample m obtained at the output thesubtractor 93. - Advantageously, the algorithm used to update the filter coefficients is the LMS algorithm (Least Mean Square). According to the invention the driving term Zm of the algorithm (that is the term to be minimized) is the mismatch between the actual and the expected run length between two transitions of the main signal.
This means that: - The cross-talk minimization scheme of the invention will be described below with reference to
FIG. 6 . As will be apparent from this description, for the proposed scheme to operate properly, the ratio α between the PLL-driven bit clock and the fixed clock that runs the analog-to-digital converters FIG. 5 , twoarrows arrows - The ratio α is advantageously supplied by a time recovery circuit external to the cross-talk cancellation means 42 and specifically designed for fast approximate recovery of the bit frequency. Such an external time recovery circuit is already present in most reading apparatuses.
- For example, in some systems (mostly in writable/rewritable systems), the wobble clock can be conveniently used for estimating the ratio α.
FIG. 1 gives an example of an implementation that will be advantageously used in such systems: inFIG. 1 , the external time recovery circuit carries reference number 50-1 and is connected In the path between themain reading element 12 and the cross-talk cancellation means 42. In other systems (mostly in ROM systems), average run length measurements can be used for the same purpose.FIG. 2 gives an example of an implementation that will be advantageously used in such systems: inFIG. 2 , the external time recovery circuit carries reference number 50-2 and is connected In the path between the cross-talk cancellation means 42 and the decoding means 44. -
FIG. 5 is a schematic representation of the received main signal. Two successive transitions Xm and Xm+1, are represented. - {tilde over (C)}(m,L) is the improved main sample on the left of the transition Xm;
- {tilde over (C)}(m,R) is the improved main sample on the right of the transition Xm;
- {tilde over (C)}(m+1,L) is the improved main sample on the left of the transition Xm+1;
- {tilde over (C)}(m+1,R) is the improved main sample on the right of the transition Xm+1;
- {tilde over (C)}(m,L)+1 is the improved main sample that precedes sample {tilde over (C)}(m,L);
- {tilde over (C)}(m,L)+1 is the improved main sample that follows sample {tilde over (C)}(m,L);
- {tilde over (C)}(m,R)−1 is the improved main sample that precedes sample {tilde over (C)}(m,R);
- {tilde over (C)}(m,R)+1 is the improved main sample that follows sample {tilde over (C)}(m,R);
- φm is the time interval between the ideal time of the transition Xm and the actual time of the transition Xm (in
FIG. 5 , φm<0); - φm+1 is the time interval between the ideal time of the transition Xm+1 and the actual time of the transition Xm+1 (in
FIG. 5 , φm+1<0); - dm+1,m is the actual run length between the two transitions Xm and Xm+1.
- In the following it is assumed for simplification purposes, without loss of generality, that:
- the time interval between two samples is equal to 1,
- the transition moment m=1 corresponds to a rising transition,
- and the time interval φm takes values from the interval
- A first implementation of the updating scheme of the invention will now be described. This first implementation is applicable when the fixed system clock is (nearly) equal to the PLL driven bit clock (that is when the ratio α is close to 1), but there is no phase lock between the two clocks.
- The LMS driving parameter to be minimized Zm is chosen to be equal to the difference between the actual run length dm+1,m and the expected run length dm+1,m (exp). Taking into account that an integer number of clock intervals should ideally fit between the transitions in the RLL encoded signal when there is no inter-symbol interference and no clock frequency variations, dm+1,m (exp) can be approximated as dm+1,m (exp)=round(dm+1,m) where round(x) is defined as the integer number that is closest to the real number x.
- Thus:
Z m=ζ(d m+1,m)
where ζ(x)=x−round(x)
with d m+1,m=[(m+1, L)−(m,L)]+φm+1−φm (equation 3)
where [(m+1,L)−(m,L)] denotes the integer number of sampling intervals between the samples {tilde over (C)}(m,L) and {tilde over (C)}(m+1,L).
In the following it is assumed that the cross-talk is not extremely large, so that for small variations of the filter coefficients
With this assumption, Zm can be approximated as follows:
Zm=ζ(dm+1,m)≈φm+1−φm+E where E is an integer independent of the filter coefficients. - The time interval φm can be computed approximately as a function gm of the improved main samples:
φm ≈g m({tilde over (C)} (m,L) ,{tilde over (C)} (m,L)−1 , . . . ,{tilde over (C)} (m,L)−NL ,{tilde over (C)} (m,R)−1 , . . . ,{tilde over (C)} (m,R)−NR )·(−1)m
The general form of a linear approximation is:
A simple 2-term linear approximation may be used, which gives:
φm≈η·({tilde over (C)} (m,L) +{tilde over (C)} (m,R))·(−1)m
with ηk,L=ηk,R=η>0
and φm+1≈η·({tilde over (C)} (m+1,L) +{tilde over (C)} (m+1,R))·(−1)m+1
Based on this simple 2-term linear approximation and on equation 3 above:
Z m≈ζ(ηR m·(−1)m+1+[(m+1,L)−(m,L)])=ζ(ηR m)·(−1)m+1
where R m ={tilde over (C)} (m,L) +{tilde over (C)} (m,R) +{tilde over (C)} (m+1,L) +{tilde over (C)} (m+1,R)
The term
in equation 2 can be computed as follows:
Eventually the expression for updating the filters coefficients is:
(f k ±)m+1=(1−μ)(f k ±)m−2·μ·η·ζ(ηR m)·(S (m,L)−k ± +S (m,R)−k ± +S (m+1,L)−k ± +S (m+1,R)−k ±) (equation 5) - A second implementation of the updating scheme of the invention will now be described that can be used when the fixed system clock (under which the filters are running) is not equal to the PLL driven bit clock (that is when the ratio α≠1).
- In this second implementation, the LMS driving parameter to be minimized Zm is also chosen to be equal to the difference between the actual run length dm+1,m and the expected run length dm+1,m (exp), but the mathematical formulae used for computing dm+1,m,φm and φm+1 have to be modified so as to take into account the frequency ratio α.
- Namely, in order to measure the run length in bit intervals, the number of samples between two transitions has to be multiplied by α, which means that:
d m+1,m=α·[(m+1,L)−(m,L)]+φm+1−φm
The transition phases φm also have to be multiplied by α. This means that the general form of the linear approximation of φm is:
and the simple 2-term expression of the linear approximation is:
φm≈α·η·({tilde over (C)} (m,L) +{tilde over (C)} (m,R))·(−1)m
Eventually the expression for updating the filters coefficients is:
(f k ±)m+1=(1−μ)(f k ±)m−2·α·μ·η·ζ(ηR m)·└S (m,L)−k ± +S (m,R)−k ± +S (m+1,L)−k ± +S (m+1,R)−k ±┘ (equation 6) - It will be noted from equations 5 and 6 that the minimization scheme of the invention does not use the notion of ideal transition time.
- With respect to the described cross-talk cancellation method, signal processor and reading apparatus, modifications or improvements may be proposed without departing from the scope of the invention. The invention is not limited to the examples provided. In particular:
- The first and second implementations that were described are based on a simple 2-term linear approximation for the calculation of the time intervals φm and φm+1. This is not restrictive. Other approximations can be used. For example, a linear approximation using more than 2 terms may be used. The LMS updating scheme for these other approximations can be derived in a similar fashion as for the 2-term linear approximation.
- The minimization algorithm used in the above described implementations is the LMS algorithm. This is not restrictive. Other minimization algorithms may be used to minimize Zm. The corresponding coefficient updating equations may be readily derived by using the same principles as those described above for the LMS algorithm.
- In the cross-talk cancellation means described with reference to
FIG. 5 , the main signal is equalized. In an alternative embodiment, the main signal may be processed by an adaptive filter in a similar fashion as the lower and upper satellite signal. - The functions described above may be implemented either in hardware or in software.
FIGS. 1, 2 and 5 are functional representations of an apparatus and a signal processor according to the invention. A hardware implementation thereof may differ from this functional block representation. - The word “comprising” does not exclude the presence of elements or steps other than those listed.
Claims (8)
1. A cross-talk cancellation method using a main signal (62) associated with a target track (32) and satellite signals (61, 63) associated with side tracks (31, 33), said main signal showing transitions (Xm) and runs of various lengths (dm+1,m) between two transitions (Xm,Xm+1), said cancellation method comprising the steps of:
filtering said satellite signals with adaptive filters (71, 73), thereby generating filtered versions (81, 83) of said satellite signals,
updating the coefficients of said adaptive filters by minimizing the mismatch between the actual and the expected run length between two transitions of the main signal, and
processing said main signal, thereby generating an improved main signal (102), said processing including a subtraction of said filtered versions of said satellite signals.
2. A program comprising instructions for implementing a cross-talk cancellation method as claimed in claim 1 when said program is executed by a processor.
3. A signal processor (40) comprising cross-talk cancellation means (42) for receiving a main signal (62) associated with a target track (32) and satellite signals (61, 63) associated with side tracks (31, 33), said main signal showing transitions (Xm) and runs of various lengths (dm+1,m) between two transitions (Xm,Xm+1), said cross-talk cancellation means comprising:
filtering means (71, 73) for filtering said satellite signals with adaptive filters, thereby generating filtered versions (81, 83) of said satellite signals,
updating means (111, 113) for updating the coefficients of said adaptive filters by minimizing the mismatch between the actual (dm+1,m) and the expected (dm+1,m (exp)) run length between two transitions of the main signal, and
processing means (93) for generating an improved main signal (102) from said main signal by subtraction of said filtered versions of the satellite signals.
4. A signal processor as claimed in claim 3 , comprising a fixed clock (55), time recovery means (130), and a bit clock (120) driven by said time recovery means, said fixed clock being asynchronous with respect to said bit clock, wherein said cross-talk cancellation means are operated at said fixed clock.
5. A signal processor as claimed in claim 4 , wherein said bit clock has a bit clock frequency and said fixed clock has a fixed clock frequency that is substantially different from said bit clock frequency such that the ratio between said bit clock frequency and said fixed clock frequency is substantially different from 1, said signal processor further comprising time recovery means (50-1, 50-2) for estimating said ratio and providing said ratio to said updating means, said updating means being designed to take said ratio into account for updating said coefficients.
6. An apparatus (6-1, 6-2) for reading a signal stored along a track on a storage medium (1) comprising a signal processor as claimed in claim 3 .
7. An apparatus for reading a signal stored along a track on a storage medium comprising a signal processor as claimed in claim 4 .
8. An apparatus for reading a signal stored along a track on a storage medium comprising a signal processor as claimed in claim 5.
Applications Claiming Priority (3)
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EP03290854.2 | 2003-04-07 | ||
EP03290854A EP1467498B1 (en) | 2003-04-07 | 2003-04-07 | A method of transmitting data according to load in a wireless cellular telecommunication network |
PCT/IB2004/000938 WO2004090892A1 (en) | 2003-04-07 | 2004-03-23 | Cross-talk cancellation scheme for rll-based storage systems |
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US20060181975A1 true US20060181975A1 (en) | 2006-08-17 |
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US10/781,627 Active 2025-01-19 US7447514B2 (en) | 2003-04-07 | 2004-02-20 | Method of transmitting data in a wireless cellular telecommunication network |
US10/552,059 Abandoned US20060181975A1 (en) | 2003-04-07 | 2004-03-23 | Cross-talk cancellation scheme for rll-based storage systems |
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US10/781,627 Active 2025-01-19 US7447514B2 (en) | 2003-04-07 | 2004-02-20 | Method of transmitting data in a wireless cellular telecommunication network |
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US (2) | US7447514B2 (en) |
EP (1) | EP1467498B1 (en) |
AT (1) | ATE322770T1 (en) |
DE (1) | DE60304448T2 (en) |
Cited By (4)
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US20090180409A1 (en) * | 2008-01-10 | 2009-07-16 | Liang-Wei Huang | Network apparatus for eliminating interference between transport ports and method thereof |
US8379498B2 (en) | 2010-09-13 | 2013-02-19 | Lsi Corporation | Systems and methods for track to track phase alignment |
US8830613B2 (en) | 2011-07-19 | 2014-09-09 | Lsi Corporation | Storage media inter-track interference cancellation |
US8879182B2 (en) | 2011-07-19 | 2014-11-04 | Lsi Corporation | Storage media inter-track interference cancellation |
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FI20040865A0 (en) * | 2004-06-21 | 2004-06-21 | Nokia Corp | Communication in a telecommunication system |
JP2006179965A (en) * | 2004-10-25 | 2006-07-06 | Nec Corp | Radio network control method, radio communication system, and base station controller |
GB0500415D0 (en) * | 2005-01-10 | 2005-02-16 | Nokia Corp | Transmitting information using multiple carriers |
GB0500416D0 (en) * | 2005-01-10 | 2005-02-16 | Nokia Corp | Transmitting information using multiple carriers |
US20060252446A1 (en) * | 2005-05-06 | 2006-11-09 | Interdigital Technology Corporation | Method and apparatus for setting a power limit for high speed downlink packet access services |
US7610017B2 (en) * | 2005-06-09 | 2009-10-27 | Vixs Systems, Inc. | Increased data rate transmissions of a wireless communication |
US7965789B2 (en) * | 2005-08-22 | 2011-06-21 | Qualcomm Incorporated | Reverse link power control for an OFDMA system |
EP1793509A1 (en) * | 2005-12-01 | 2007-06-06 | Alcatel Lucent | Transmit power control for a communication system |
US8103284B2 (en) * | 2006-03-24 | 2012-01-24 | Alcatel Lucent | Method for reporting uplink load measurements |
CN101056129B (en) * | 2007-05-18 | 2011-04-13 | 华为技术有限公司 | Carrier power allocation method and system for the same power amplification |
EP2898732B1 (en) * | 2012-09-24 | 2017-05-03 | Nec Corporation | Method and system for operating stations in a cooperative station network |
CN108668364B (en) | 2017-03-29 | 2019-09-17 | 大唐移动通信设备有限公司 | A kind of method and device for exempting from scheduled transmission |
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- 2003-04-07 EP EP03290854A patent/EP1467498B1/en not_active Expired - Lifetime
- 2003-04-07 AT AT03290854T patent/ATE322770T1/en not_active IP Right Cessation
- 2003-04-07 DE DE60304448T patent/DE60304448T2/en not_active Expired - Lifetime
-
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Also Published As
Publication number | Publication date |
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EP1467498A1 (en) | 2004-10-13 |
US7447514B2 (en) | 2008-11-04 |
DE60304448T2 (en) | 2006-09-21 |
DE60304448D1 (en) | 2006-05-18 |
ATE322770T1 (en) | 2006-04-15 |
US20040198370A1 (en) | 2004-10-07 |
EP1467498B1 (en) | 2006-04-05 |
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